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Zen kodovoe nazvanie mikroarhitektury vychislitelnyh yader processorov kompanii AMD vypolnennyh po tehnicheskoj norme 14 nanometrov Na osnove etoj mikroarhitektury vyshli processory AMD pod torgovymi markami Ryzen i EPYC vypusk pervyh processorov etoj arhitektury sostoyalsya 2 marta 2017 goda AMD ZenCentralnyj processorProizvodstvo 4 kvartal 2016Razrabotchik Advanced Micro DevicesProizvoditelPotreblyaemaya moshnost 65 95 VtTehnologiya proizvodstva 14 nmNabory instrukcij x86 AMD64 x86 64 rasshireniya MMX SSE SSE2 SSE3 SSSE3 SSE4 1 SSE4 2 SSE4a AMD V AES AVX AVX2 AVX512F XOP FMA3 SHAChislo yader do 8 nastolnye PK do 16 HEDT do 32 servery Razyomy Socket AM4 s 1331 kontaktomSocket TR4 s 4094 kontaktamiSocket SP3r2 s 4094 kontaktamiYadra Raven RidgeSummit RidgeNaplesZen Zen Razrabotka velas prakticheski s nulya Tak klasternaya mnogopotochnost smenilas odnovremennoj simultaneous multithreading AMD obeshaet prirost kolichestva vypolnyaemyh za takt instrukcij na 40 po sravneniyu s predshestvuyushej mikroarhitekturoj angl Chipy na etoj mikroarhitekture delyatsya na tri gruppy dve gruppy torgovoj marki Ryzen Summit Ridge nastolnye processory bez graficheskih yader i Raven Ridge nastolnye i mobilnye processory so vstroennymi graficheskimi yadrami i odnu gruppu torgovoj marki EPYC Naples angl servernye processory Opisanie arhitekturyPo slovam AMD osnovnoe vnimanie udelyalos uvelicheniyu kolichestva operacij za takt IPC Instructions Per Clock Perehod ot mikroarhitektury modulej ispolzuemoj v Bulldozer k polnocennym yadram kak ozhidalos pomozhet uvelichit proizvoditelnost na yadro v operaciyah s plavayushej tochkoj za schyot bolshego kolichestva blokov FPU Osobennosti mikroarhitektury dva potoka na yadro opcionalno snizhenie chisla oshibok prognozirovaniya dobavlen kesh dekodirovannyh mikrooperacij uvelichen razmer kesha L1 uvelichenie propusknoj sposobnosti k kesh pamyati optimizaciya zaderzhek dostupa k kesh pamyati istochnik ne ukazan 1658 dnej po 8 MB obshej kesh pamyati tretego urovnya tipa victim na kazhdyj kompleks iz 4 yader po 512 KB individualnoj v 2 raza bolee bystroj kesh pamyati vtorogo urovnya na kazhdoe yadro vklyuchaet kesh pervogo urovnya po 64 KB na instrukcii i 32 KB na dannye v individualnoj v dva raza bolee bystroj kesh pamyati pervogo urovnya na kazhdoe yadro kesh vtorogo urovnya inklyuziven po otnosheniyu k keshu pervogo urovnya dva bloka apparatnogo uskoreniya standarta shifrovaniya AES Universalnaya arhitektura ZenVse processory arhitektury Zen Ryzen Threadripper EPYC osnovyvayutsya na izbytochnyh kristallah Zeppelin kommutiruemyh s pomoshyu shiny Infinity Fabric rabotayushej na realnoj chastote OZU Osnovoj kristalla Zeppelin yavlyayutsya 2 bloka Sore Complex CCX i obshij kesh 3 go urovnya L3 V kazhdom CCX raspolozheny 4 yadra Zen s obshim dlya vseh yader keshem tretego urovnya obyomom 8 MB na kompleks Kesh tretego urovnya po bolshej chasti eksklyuzivnyj v to vremya kak dannye kesha pervogo urovnya obyazatelno prisutstvuyut v keshe vtorogo urovnya Kazhdoe yadro v komplekse mozhet obratitsya k yachejkam kesha lyubogo urovnya primerno s odnoj i toj zhe skorostyu odnako v ramkah CCX imeetsya nekotoroe zamedlenie pri obrashenii k dalnej 4MB polovine L3 kesha a dostup k 8 MB L3 pamyati v sosednij CCX prohodit s v 2 raza bolee nizkoj skorostyu Kristall s yadrami Zen izgotovlen s primeneniem FinFET 14nm tehnologii fabriki GlobalFoundries Vse nastolnye processory AMD Ryzen 3 Ryzen 5 i Ryzen 7 ispolzuyut processornyj razem AMD AM4 Ryzen Threadripper processornyj razem AMD TR4 mobilnye processory Ryzen processornyj razem AMD FP4 servernye EPYC processornyj razem SP3r2 SravnenieInzhenernyj obrazec AMD Zen v sravnenii s processorom Intel Broadwell E Core i7 6900K zakonchil rendering v programme dlya 3D modelirovaniya Blender na 2 bystree pri chastote 3 4 GGc protiv 3 7 GGc u Sore i7 6900K Spisok processorovNa mikroarhitekture Zen osnovany processory tryoh grupp Summit Ridge nastolnye processory bez graficheskih yader Raven Ridge mobilnye i nastolnye processory so vstroennymi graficheskimi yadrami i Naples servernye processory bez graficheskih yader Mnozhitel chastoty vseh modelej processorov razblokirovan potomu vse oni poddayutsya razgonu Summit Ridge nastolnye processory bez graficheskih yader Seriya Model Yadra Potoki Shtatnaya chastota CP Uvelichennaya chastota CP Kesh 1 urovnya Kesh 2 urovnya Kesh 3 urovnya Processornyj razem Operativnaya pamyat PCI linii Bazovoe teplovydelenie Peremennoe teplovydelenie Data vyhodaRyzen 3 1200 4 4 3 1 GGc 3 4 GGc 384 Kb 512 Kb na yadro 8 Mb AMD AM4 PGA Dvuhkanalnaya DDR4 2666 24 65 Vt 45 65 Vt 27 iyunya 20171300X 3 5 GGc 3 7 GGcRyzen 5 1400 4 8 3 2 GGc 3 4 GGc 11 aprelya 20171500X 3 5 GGc 3 7 GGc 16 Mb1600 6 12 3 2 GGc 3 6 GGc 576 Kb1600X 3 6 GGc 4 0 GGc 95 VtRyzen 7 1700 8 16 3 0 GGc 3 7 GGc 768 Kb 65 Vt 2 marta 20171700X 3 4 GGc 3 8 GGc 95 Vt1800X 3 6 GGc 4 0 GGcRyzen Threadripper 1900X 3 8 GGc 4 2 GGc AMD TR4 LGA Chetyryohkanalnaya DDR4 2666 64 180 Vt 10 avgusta 20171920X 12 24 3 5 GGc 4 1 GGc 1 125 Mb 32 Mb1950X 16 32 3 4 GGc 3 9 GGc 1 5 Mb 31 avgusta 2017Mobilnye processory Raven Ridge Seriya Model Yadra Potoki Shtatnaya chastota CP Uvelichennaya chastota CP Kesh 1 urovnya Kesh 2 urovnya Kesh 3 urovnya Grafika Chastota grafiki Processornyj razem Bazovoe teplovydelenie Peremennoe teplovydelenie Data vyhodaRyzen 7 2700U 4 8 2 2 GGc 3 8 GGc 384 Kb 96 Kb na yadro 2 Mb 512 Kb na yadro 4 Mb 4 Mb na kompleks yader Vega 10 1 3 GGc AMD FP5 BGA 15 Vt 12 15 Vt 26 oktyabrya 2018Ryzen 5 2500U 2 0 GGc 3 4 GGc Vega 8 1 1 GGcRyzen 3 2300U 4 Vega 6 8 yanvarya 20182200U 2 2 5 GGc 192 Kb 96 Kb na yadro 1 Mb 512 Kb na yadro Vega 3 1 0 GGcNastolnye processory Raven Ridge Seriya Model Yadra Potoki Shtatnaya chastota CP Uvelichennaya chastota CP Kesh 1 urovnya Kesh 2 urovnya Kesh 3 urovnya Grafika Chastota grafiki Processornyj razem Bazovoe teplovydelenie Peremennoe teplovydelenie Data vyhodaRyzen 5 2400G 4 8 3 6 GGc 3 9 GGc 2 Mb 4 Mb Vega 11 1 25GGc AMD AM4 PGA 65 Vt 45 65 Vt 12 fevralya 2018Ryzen 3 2200G 4 4 3 5 GGc 3 7 GGc Vega 8 1 1 GGcAthlon 3050G 2 4 3 4 GGc Vega 3Athlon 3000G 2 4 3 5 GGc Vega 3Athlon 240GE 2 4 3 5 GGc 1Mb Vega 3 1 0 GGc 35VtAthlon 220GE 2 4 3 4 GGc Vega 3Athlon 200GE PRO 2 4 3 2 GGc Vega 3Athlon 200GE 2 4 3 2 GGc Vega 3 Servernye processory na baze Zen imeyut kodovoe nazvanie Naples i byli predstavleny v iyune 2017 goda kak Epyc 7000 s kolichestvom yader ot 8 do 32 Bolshinstvo iz nih podderzhivaet dvuhprocessornye sistemy ostalnye 7xxxP mogut ispolzovatsya tolko v odnoprocessornyh serverah Ispolzuyut LGA soket Socket SP3r2 Sm takzhepredshestvuyushaya mikroarhitektura angl primeneny v APU semejstva angl Spisok mikroprocessorov AMDPrimechaniyaUstrojstva ispolneniya imeyut shirinu 128 bit 1 ot 17 marta 2017 na Wayback Machine FP side there are four pipes combined 128 bit FMAC instructions These cannot be combined for one 256 bit AVX2 pri ispolnenii 256 bitnyh instrukcij vozmozhno uvelichenie latentnosti AMD 7th Gen Bristol Ridge and AM4 Analysis Up to A12 9800 B350 A320 Chipset OEMs first PIBs Later neopr Data obrasheniya 4 dekabrya 2017 7 avgusta 2017 goda AMD hints at high performance Zen x86 architecture neopr Data obrasheniya 16 avgusta 2016 2 aprelya 2015 goda AMD Ryzen AMD Rajzen harakteristiki processorov cena obzor proizvoditelnosti neopr m pc net Data obrasheniya 7 marta 2017 8 marta 2017 goda AMD Announces Zen 40 IPC Improvement Over Excavator Coming In 2016 angl 7 maya 2015 Data obrasheniya 16 avgusta 2016 5 iyunya 2016 goda Weekend tech reading AMD Zen and their return to high end CPUs tracking Windows pirates angl Data obrasheniya 16 avgusta 2016 11 maya 2015 goda AMD Bulldozer was not a game changer but next gen Zen will be angl 11 sentyabrya 2014 Data obrasheniya 16 avgusta 2016 4 iyunya 2016 goda Software Optimization Guide for AMD Family 17h Processors ot 12 iyulya 2017 na Wayback Machine AMD June 2017 AMD Zen Microarchitecture Dual Schedulers Micro Op Cache and Memory Hierarchy Revealed 17 dekabrya 2019 Data obrasheniya 26 avgusta 2017 https www anandtech com show 10578 amd zen microarchitecture dual schedulers micro op cache memory hierarchy revealed 2 ot 17 dekabrya 2019 na Wayback Machine The L1 data cache is both double in size compared to Bulldozer https www anandtech com show 10578 amd zen microarchitecture dual schedulers micro op cache memory hierarchy revealed 2 ot 17 dekabrya 2019 na Wayback Machine AMD s big headline number overall is that Zen will offer up to 5x cache bandwidth to a core over previous designs https www anandtech com show 10578 amd zen microarchitecture dual schedulers micro op cache memory hierarchy revealed ot 10 yanvarya 2020 na Wayback Machine AMD is also stating that the load stores will have lower latency within the caches AMD Zen Microarchiture Part 2 Extracting Instruction Level Parallelism 17 marta 2017 Data obrasheniya 26 avgusta 2017 processory AMD arhitektury Zen 1 stroyatsya iz etih blokov CCH neopr Data obrasheniya 8 noyabrya 2019 8 noyabrya 2019 goda Infinity Fabric IF AMD neopr Data obrasheniya 8 noyabrya 2019 12 dekabrya 2019 goda AMD s Ryzen Cache Analyzed Improvements Improveable CCX Compromises TechPowerUp neopr Data obrasheniya 11 avgusta 2018 11 aprelya 2019 goda The Core Complex Caches and Fabric The AMD Zen and Ryzen 7 Review A Deep Dive on 1800X 1700X and 1700 neopr Data obrasheniya 11 avgusta 2018 5 dekabrya 2018 goda V 2018 godu AMD perejdet na tehprocess 12 nm LP Hardwareluxx Russia neopr Data obrasheniya 10 dekabrya 2019 10 dekabrya 2019 goda https fuse wikichip org news 1177 amds zen cpu complex cache and smu ot 7 aprelya 2019 na Wayback Machine That configuration consists of 1 4 billion transistors and occupies 44 mm using GlobalFoundries 14LPP FinFET process Ian Cutress Unpacking AMD s Zen Benchmark Is Zen actually 2 Faster than Broadwell neopr Data obrasheniya 24 avgusta 2016 24 avgusta 2016 goda AMD prodemonstrirovala vozmozhnosti processora Ryzen Zen 12 yanvarya 2017 Data obrasheniya 26 avgusta 2017 AMD Athlon 3000G vsyo zhe postroen na yadrah Zen pervogo pokoleniya rus 3DNews Daily Digital Digest Data obrasheniya 30 dekabrya 2020 23 avgusta 2020 goda predstavleny AMD v 2016 g v nih vpervye realizovana STAPM Skin Temperature Aware Power Management tehnologiya kompanii AMD kotoraya ispolzuetsya v processorah rasschitannyh na primenenie v kompaktnyh ustrojstvah takih kak noutbuki ili portativnye igrovye konsoli V nih razmeshaetsya neskolko dopolnitelnyh termodatchiki kotorye schityvayut tekushuyu temperaturu v raznyh chastyah korpusa i otpravlyayut ee processoru V sluchae vyhoda peredannyh znachenij za predely zaranee zadannyh limitov processor avtomaticheski ogranichivaet sobstvennuyu moshnost i taktovuyu chastotu chto privodit k snizheniyu urovnej teplovydeleniya i proizvoditelnosti Blagodarya etomu cherez nekotoroe neprodolzhitelnoe vremya temperatura korpusa ustrojstva tozhe snizhaetsya 2 ot 1 fevralya 2024 na Wayback MachineSsylkiArhitektura Zen rus Predstavlyaem processory AMD Ryzen rus
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